RC702 Boot Process

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RC702 ROM boot loader

The RC702 has a 2K boot loader ROM (ROA375) for booting the computer. In normal operation the RC702 has 64K linear RAM from 0x0000-0xFFFF, but a software-controlled switch controls the mapping of the boot loader ROM into the address space. When the RC702 starts, this ROM is mapped into the first 2K of the address space. Writing to port 0x14 will disable this mapping and all 64K of RAM can then be accessed.

After a CPU reset (and at power-up) the Z80 CPU starts executing at address 0x0000. The boot loader routine starts by moving the contents of the boot loader ROM to 0x7000:

; Disable interrupts
0000  f3           DI

; Set up stack
0001  31 ff bf     LD      SP,0xbfff

; Find first non-zero byte after 0x0068
0004  21 68 00     LD      HL,0x0068
0007  7e           LD      A,(HL)
0008  b7           OR      A,A
0009  23           INC     HL
000a  ca 07 00     JP      Z,0x0007

; If first non-zero byte after 0x0068 is not 0xFF move back one
000d  fe ff        CP      A,0xff
000f  ca 13 00     JP      Z,0x0013
0012  2b           DEC     HL

; DE = source (0x0069), HL = destination (0x7000), BC = size (0x0798) 
0013  eb           EX      DE,HL
0014  21 00 70     LD      HL,0x7000
0017  01 98 07     LD      BC,0x0798

; Copy boot loader ROM to RAM at 0x7000
001a  1a           LD      A,(DE)
001b  77           LD      (HL),A
001c  13           INC     DE
001d  23           INC     HL
001e  0b           DEC     BC
001f  79           LD      A,C
0020  b0           OR      A,B
0021  c2 1a 00     JP      NZ,0x001a

; Jump to entry point in copied boot rom
0024  c3 d0 70     JP      0x70d0

This copies the content of the boot loader ROM from 0x0069 to RAM address 0x7000. It looks like the boot loader ROM consists of two different parts that have been concatenated. The first part shown above (which has some extra unused code in the range 0x0027-0x0067) is the first stage of the ROM boot loader. This code has 0x0000 as origin. The second part above 0x0069 is another assembly program that has been built to run at address 0x7000. Searching for the first non-zero byte after address 0x0068 was probably needed because the contatenation of the two parts could produce some padding between these.

The boot loader code is copied from ROM to RAM to free up the lower portion of the memory where the bootstrap from the disk will be loaded. However, this cannot be done without disabling the ROM mapping, so moving the ROM boot loader routine to RAM at 0x7000 solves this problem.

The rest of the ROM loader performs the following functions:

• Set up stack at 0xBFFF. This has actually already been done, so this also indicates that the first and second stage of the ROM loader are independent programs.
• Set up interrupt vector table at 0x7300 with interrupt routines for INT6 (CRT) and INT7 (FDC) and and enable interrupt mode 2.
• Initialize PIO (keyboard and parallel port).
• Initialize CTC (counters and timers).
• Initialize DMA (memory transfer for floppy and display).
• Initialize CRT (80x24 display at memory location 0x7800).
• Disable ROM so RAM at 0x0000-0x7FF is accessible.
• Read the first track of the floppy disk (track 0, side 0) into memory at adress 0x0000.
• Jump to the entry point of the boot loader. The location of the entry point in the bootstrap is stored in 0x0000.

Bit 7 of the DIP switches selects between Mini (5 1/4") and Maxi (8") floppy. When this is set to on (i.e. 5 1/4" floppy) the following is read from the disk:

• Read 0x0800 bytes into RAM address 0x0000 from track 0, side 0, 16 sectors of 128 bytes (2048 bytes).
• Read 0x1000 bytes into RAM address 0x0800 from track 0, side 1, 32 sectors of 128 bytes (4096 bytes).